Overview of ESTC 2024 Professional Development Courses on September 11, 2024

Sensors are everywhere! They create data and provide the “food” for the Internet of Things. Which specific requirements distinguish MEMS and sensor packaging from standard assembly? How are these challenges being tackled? Do we need advanced packaging technologies for MEMS? These are just a few questions which are addressed in the course.

MEMS involve mechanically movable or oscillating parts creating the need for cavity packaging. Concepts for cavity packages are followed by a discussion of package induced stress and its impact to MEMS performance. Among others, respective case studies comprise pressure sensors and MEMS-microphones including a discussion on MEMS-specific materials properties. The advanced packaging section contains an investigation on integrating MEMS-microphones into Fan Out Wafer Level Packages. Robustness requirements and approaches for risk mitigation in harsh environments represent further topics within the PDC’s MEMS section.
The course will go through package requirements of magnetic sensors and stress the importance of advanced packaging for GHz devices – including antenna-in-package technology. 
The concluding chapter deals with heterogeneous integration topics. Where is the overlap of the processor-driven world of advanced packaging and the MEMS/Sensor world? Where are the differences and how can we overcome them? A discussion on these topics will be welcome!

The modern car has increased semiconductor content and dollar value.  Semiconductors enable the majority of innovations in automotive.  The increased emphasis on autonomous driving and the electrification of vehicles has resulted in enormous changes for semiconductors and packaging.  The design, materials, and reliability strategies for automotive electronics will be presented.  Electronics are increasingly being used in automotive platforms for various mission-critical and safety-critical activities, such as guidance, navigation, control, charging, sensing, and operator interaction.  Over the last two decades, automotive platforms have expanded to incorporate hybrid and fully-electric vehicles.  Much of the electronics is located under the car’s hood or in the trunk, where temperatures and vibration levels are far higher than in consumer office applications.  During the vehicle’s use-life, electronics in the automotive underhood may be exposed to sustained high temperatures of 125-150°C for extended periods of time.  The automotive electronics council (AEC) has graded electronics for automotive purposes into four categories: grade-0, grade-1, grade-2, and grade-3.  Grade-0 components have the most demanding criteria of the four grade categories, with predicted power temperature cycling ranging from -40°C to +150°C for 1000 cycles and ambient temperature cycling ranging from -55°C to +150°C for 2000 cycles.  Furthermore, the grade-0 components are expected to be capable of sustaining high-temperature storage for 1000 hours at 175°C.  With the introduction of new packaging architectures, packaging applications have continued to evolve, allowing for powerful computing on mobile automobile platforms.  New materials and integration technologies have also emerged, allowing for tighter integration of electronics sensing and processing into the structural characteristics of the vehicle.  The automobile platform faces a series of constraints particular to the real-time context for enabling sophisticated functionality. 

Specifically, the course will encompass the following topics:

1. Role of electronics on the automotive platform
2. Automotive environments
3. Zero-Defects
4. Second-Level Solder Interconnect Design Considerations
5. Copper Wirebond Interconnects
6. Advanced Packaging Interfaces
7. Vibration Effects
8. Sustained High Temperature and Wide Thermal Extremes
9. Corrosion Propensity
10. Accelerated Testing

This course will cover the fundamentals of all aspects of flip chip fabrication and assembly technologies. It is divided into two main sections. The first part covers the main type of assembly technologies chip package interaction, package warpage control, yield detractors, substrate technologies, etc. The second dives into the depth of the fundamental aspect of flip chip fabrication mainly; interconnect technologies, under-bump metallurgy selection, fabrication methods and solder depositions methods. The course will cover the various failure modes related to bumping, such as barrier consumption, Kirkendall void formation, non-wets, BEOL dielectric cracking, etc.  Special focus of the course will be on fine pitch technologies, mainly u-Pillar and Hybrid bonding. The goal of this course is to provide the students with a better understanding of flip chip and assembly applications so that a reliable, innovative, better time to market, and more cost-effective solution can be achieved.

Course Outline
1. Introduction to Flip Chip Technologies
2. Flip Chip Technologies: Mass Reflow Process
3. Flip Chip Technologies: Thermal Compression
4. Substrate Technologies, Underfill, Package Warpage Control, and Yield
5. Flip Chip Reliability Assessment, Failure Modes, Examples, and Modeling
6. Flip Chip Si Package Co-Design
7. Chip-Package Interaction and Flip Chip Electromigration
8. Flip Chip New Trends: Wafer Level CSP; Wafer Level Fan-Out; and Panel-Level Packaging
9. Fine pitch interconnect options (for <100um pitch)
10. Bumping Ground Rules
11. Flip Chip Under-bump Metal and Intermetallic
12. Flip Chip Solder Deposition Processes
13. Cu Pillar Technology
14. Flip Chip Solder Selection and SLID
15. Hybrid Bonding (for less that 10um pitch)